1. Field of the Invention
The present invention generally relates to an ATM (Asynchronous Transfer Mode) communications system, and more particularly to an ATM communications system in which data conforming to an HDLC (High-Level Data Link Control) procedure is transferred in the form of ATM cells.
2. Description of the Prior Art
Generally, computer systems, such as host computers, workstations, and personal computers, use communications protocols with layer structures. The OSI has proposed a layer structure consisting of seven layers. The second layer or layer 2 is a data link layer, and HDLC procedures are main procedures for the data link layer. Examples of the HDLC procedures are LAPB, LAPD SNA (IBM), and FNA (Fujitsu).
Computer systems are coupled to each other in broadband communications by means of a line switching network, a packet switching network or a dedicated line network. Recently, there has been considerable activity in the development of ATM networks capable of handling multiple media, such as speech, computer data and image data. It is expected that the existing terminals will continue to be used for a while after the ATM networks enter into practical use. Under this circumstance, in order to reduce delay in an end-to-end transfer, it is necessary to use an efficient conversion procedure (an assembling and disassembling procedure) for converting HDLC frames and ATM cells into each other.
FIG. 1A shows an OSI (Opened Systems Interconnection) standard model, in which protocols are respectively defined for layers 1 to 7. FIG. 1B shows a layer structure of a communications system which is a line switching network or a dedicated line network in the data transfer mode. Communications nodes provided between computer systems (terminals) are TDM (Time Division Multiplexing) equipment or PBXs (Private Branch exchanges). The computer systems or terminals in the communications system shown in FIG. 1B execute processes for layers 1 to 7, and the communications node execute processes for layer 1.
FIG. 1C shows a frame format conforming to HDLC which is a typical data link protocol for layer 2 (data link layer) in the OSI standard model. As shown, the frame comprises two flag fields F, an address field A, a control field C, an information field I, and a frame check sequence (FCS) field.
FIGS. 2A, 2B and 2C show HDLC data communications using an ATM. More particularly, FIG. 2A shows an ATM communications protocol. The ATM communications protocol comprises a physical layer, an ATM layer, an adaptation layer and high-order layers. The physical layer and the ATM layer correspond to layer 1, and the adaptation layer relates to layers 1 and 2. FIG. 2B shows an ATM cell format, which has a fixed length of 53 bytes (one byte is equal to 8 bits). The first five bytes form an ATM header, sixth and seventh bytes form an adaptation header, eighth to 51st bytes form an information field, and 52nd and 53rd octets form an adaptation trailer. The ATM header contains controlling information, such as routing information concerning the ATM cell. The adaptation header and the adaptation trailer contain control information concerning cell transfer and disassembly of cells at a terminal or computer system with which communicates.
FIG. 2C shows communications of HDLC data in an ATM network. The computer systems handle the physical layer, the HDLC layer (data link layer), and layers higher than the HDLC layer. Each of the communications nodes handles the physical layer and the ATM layer. Particularly, edge communications nodes (a calling communications node and a called communications node) further handle the adaptation layer (ATM cell assembly and disassembly) in addition to the physical layer and the ATM layer.
FIG. 3A shows a conventional ATM cell assembling and disassembling procedure in the ATM network. FIG. 3A shows an ATM cell assembling and disassembling process executed in communications nodes in which HDLC data is processed. That is, the flags in the frame of the HDLC data sent by a computer system are deleted therefrom at a communications node. The remaining data contained in the fields A, C, I and FCS are divided into pieces every 44 bytes. An ATM cell shown in FIG. 2 is assembled for each 44-byte data segment. That is, each ATM cell comprises the ATM header, the adaptation header, the 44-byte data and the adaptation trailer. When the original data except for the flags has a length larger than a plurality of cells, each ATM cell assembled comprises, as adaptation information, information showing the position of the ATM cell of interest. In other words, the above information shows in which one of a BOM (Beginning-Of-Message) cell, a COM (Continuation-Of-Message) cell and an EOM (End-Of-Message) cell the ATM cell having the above information is. When the original data length except for the flags is located equal to or less than a data length accommodated in one ATM cell (44 bytes), the adaptation information contained in a single ATM cell shows an SSM (Single-Segment-of-Message) cell.
A process for assembling ATM cells from HDLC frames and disassembling ATM cells into HDLC frames has not been practically used. However, one may consider an application of the existing communications techniques, as shown in FIG. 3B. A communications system shown in FIG. 3B comprises a computer system on a transmission side 70, a communication node 71 on the transmission side, a communication node 72 on a reception side, and a computer system 73 on the reception side.
A cell assembling unit 711 of the communications node on the transmission side converts HDLC frames into ATM cells, each of which cells has a fixed data length. After receiving one frame from the computer system 70, the cell assembling unit 711 starts to assemble ATM cells. A cell disassembling unit 721 of the communications node 72 on the reception side disassembles the ATM cells into HDLC frames, and starts, after receiving ATM cells corresponding to one frame, to disassemble these ATM cells.
It will now be assumed that the computer system 70 sends an HDLC frame of 256 bytes to a transmission line at a bit rate of 2.4 kbps. A frame receiver 710 of the communications node 71 receives all of the HDLC frame, and then instructs the cell assembling unit 711 to assemble ATM cells. Hence, the cell assembling process is started after 256.times.8/2.4 kbps (=853 ms). The ATM cells thus assembled are successively sent to a transmission line via a cell transmitter 712.
The ATM cells from the communications node 71 are transferred via, for example, other communications nodes in the ATM network, and are then received by a cell receiver 720 of the communications node 72 at the receiving side. Each time the ATM cells pass through a communications node in the ATM network, they are written into a buffer in the communications node and read therefrom. During this time, various calls are switched via each buffer, and thus the time necessary for the cells to pass through each node are not constant, and is dependent on the number of stages of ATM switches and the number of cells remaining in each buffer.
The interval between consecutive ATM cells in the same HDLC frame at the transmission side is different from those at the reception side. That is, the interval between the consecutive ATM cells fluctuates. In order to cope with fluctuations in the interval between the consecutive ATM cells, a maximum fluctuation time Amx (ms) is taken into account. That is, the ATM cell disassembling process is started when the maximum fluctuation time Amx has elapsed after the first ATM cell (BOM cell) is received. Data contained in the HDLC frame thus formed can be successively transferred to the computer system 73 via a frame transmitter 722.
However, the above-mentioned related art has the following disadvantages. It takes a long time to assemble ATM cells from the HDLC frame on the transmission side because the ATM cell assembling process is started after the HDLC frame has been completely received. Further, it takes a long time to disassemble ATM cells to generate the original HDLC frame because it is always necessary to start the ATM cell disassembling process when the maximum fluctuation time Amx has elapsed after the first ATM cell is received. As a result, there is a large delay in the end-to-end transfer. This increases the time it takes to execute applications (processes in the upper layers) between the computer systems.